Blogs
Basics
Git
Git helps developers keep track of the history and structure of changes made in their code repository as a distributed systems tool. This tutorial will help you understand the core Git commands and procedures.…
Markdown Language — Readme.md
Markdown is a lightweight markup language used to format text. Its primary purpose is to make writing and reading formatted documents simple, especially for documentation…
Verilator Beginner’s Guide
Verilator is a cycle-accurate, open-source Verilog and SystemVerilog simulator that compiles HDL into C++ or SystemC code for high-speed simulation. It is ideal for simulating synchronous digital logic circuits…
Intermediate
Xilinx Vivado IP for Block RAM Implementation
The Xilinx® IP Block Memory Generator (BMG) core is an advanced memory constructor that generates area and performance-optimized memories using embedded block RAM resources in Xilinx FPGAs. The BMG core…
Spike and its Installation
With the growing adoption of the RISC-V architecture, developers and hardware engineers have found themselves in need of reliable tools for simulating, testing, and validating RISC-V designs before hardware is…
A Beginners Guide to RISCOF
RISCOF (RISC-V Compliance Framework) is a tool designed to make sure that processors based on the RISC-V ISA work correctly and follow the rules set by RISC-V. Think of it like a quality check for RISC-V…
Advanced
Getting Started with Gem5-CVA6
Gem5 is a powerful computer architecture simulator that researchers and developers use to explore and analyze computer system performance. With its highly modular and extensible design, Gem5 provides a flexible…
Running Zephyr on UETRV-PCore with RISC-V
Zephyr is a scalable, open-source, real-time operating system (RTOS) designed for resource-constrained devices. It supports a wide range of hardware architectures, including RISC-V, ARM, x86, and others…