Building Future Digital System Solutions Today
Projects
Booting Linux on the UETRV-PCORE
Booting Linux on the UETRV-PCORE with FPGA as the target device involves a meticulous configuration process. The first-level bootloader, OpenSBI …
Integrating SPI and UART to P-Core
The project involved integrating two serial peripheral modules, Serial Peripheral Interface SPI and Universal Asynchronous Receiver Transmitter …
Modelling RISC-V Core on gem5
Gem5 is a widely-used architectural simulator that models a diverse set of parameters. We explored the gem5 design space and …
Virtual Memory Compliance with RISCV
Virtual memory compliance refers to the extent to which the behavior of the virtual memory subsystem specifications is outlined in …